UNITED STATES
SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 10-K

Commission file number: 000-18032

LATTICE SEMICONDUCTOR CORPORATION

(Exact name of registrant as specified in its charter)

Registrant’s telephone number, including area code: (503) 268-8000

Securities registered pursuant to Section 12(b) of the Act: None

Securities registered pursuant to Section 12(g) of the Act:

Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act. Yes o  No x

Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Act. Yes o No x

Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes x  No o

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K (§229.405 of this chapter) is not contained herein, and will not be contained, to the best of the registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. x

Indicate by check mark whether the registrant is a large accelerated filer, an accelerated filer, or a non-accelerated filer. See definition of  “accelerated filer and large accelerated filer” in Rule 12b-2 of the Exchange Act. (Check one):

Indicate by check mark whether the registrant is a shell company (as defined in Rule 12b-2 of the Act). Yes o   No x

DOCUMENTS INCORPORATED BY REFERENCE

The information required by Part III of this Report, to the extent not set forth herein, is incorporated herein by reference from the registrant’s definitive proxy statement relating to the 2006 Annual Meeting of Stockholders, which definitive proxy statement shall be filed with the Securities and Exchange Commission within 120 days after the end of the fiscal year to which this Report relates.

LATTICE SEMICONDUCTOR CORPORATION
FORM 10-K
ANNUAL REPORT
TABLE OF CONTENTS

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Forward-Looking Statements

This Annual Report on Form 10-K contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933, as amended, and Section 21E of the Exchange Act. Any statements about our expectations, beliefs, plans, objectives, assumptions or future events or performance are not historical facts and may be forward-looking. We use words or phrases such as “anticipates,” “believes,” “estimates,” “expects,” “intends,” “plans,” “projects,” “may,” “will,” “should,” “continue,” “ongoing,” “future,” “potential” and similar words or phrases to identify forward-looking statements.

Forward-looking statements involve estimates, assumptions, risks and uncertainties that could cause actual results to differ materially from those expressed in the forward-looking statements. The key factors that could cause our actual results to differ materially from the forward-looking statements include any actions resulting from the Securities and Exchange Commission’s ongoing informal inquiry, developments in the pending securities class action litigation, the possibility that we are unable to realize the anticipated benefits from our recently announced restructuring, overall semiconductor market conditions, market acceptance and demand for our new products, our dependencies on our silicon wafer suppliers, the impact of competitive products and pricing, technological and product development risks, and the other risks that are described herein and that are otherwise described from time to time in our filings with the Securities and Exchange Commission, including but not limited to the items discussed in “Risk Factors” set forth in Item 1A of this report. You should not unduly rely on forward-looking statements because our actual results could materially differ from those expressed in any forward-looking statements made by us. Further, any forward-looking statement applies only as of the date on which it is made. We are not required to update any forward-looking statement or statements to reflect events or circumstances after the date on which such statement is made or to reflect the occurrence of unanticipated events.

Item 1. Business.

Lattice Semiconductor Corporation designs, develops and markets high performance programmable logic products and related software. Programmable logic products are widely used semiconductor components that can be configured by end customers as specific logic circuits, and thus enable shorter design cycle times and reduced development costs. Our end customers are primarily original equipment manufacturers in the communications, computing, consumer, industrial, automotive, medical and military end markets.

Lattice was incorporated in Oregon in 1983 and reincorporated in Delaware in 1985. Our principal offices are located at 5555 N.E. Moore Court, Hillsboro, Oregon 97124, our telephone number is (503) 268-8000 and our website can be accessed at www.latticesemi.com. Information contained or referenced on our website is not incorporated by reference into, and does not form a part of, this Annual Report on Form 10-K.

We report based on a 52 or 53-week year ending on the Saturday closest to December 31. For ease of presentation, we have adopted the convention of using March 31, June 30, September 30 and December 31 as period end dates for all financial statement information. Our fiscal 2005 and 2004 were 52-week years. Our 2003 fiscal year was a 53-week year.

Programmable Logic Market Background

Three principal types of digital integrated circuits are used in most electronic systems: microprocessors, memory and logic. Microprocessors are used for control and computing tasks, memory is used to store programming instructions and data, and logic is employed to manage the interchange and manipulation of digital signals within a system. Logic contains interconnected groupings of simple logical “and” and logical “or” functions, commonly described as “gates.” Typically, complex combinations of individual gates are required to implement the specialized logic functions required for systems.

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Logic circuits are found in a wide range of today’s digital electronic equipment including communications, computing, consumer, industrial, automotive, medical, and military systems. The logic market encompasses general purpose logic semiconductor products, which include programmable logic devices, and application-specific semiconductor products, which include ASICs (devices marketed to a single user) and ASSPs (devices marketed to multiple users). According to Gartner1, these two product categories combined accounted for approximately 39% of the estimated $235 billion worldwide semiconductor market in 2005. Manufacturers of electronic equipment are challenged to bring differentiated products to market quickly. These competitive pressures often preclude the use of custom-designed ASICs, which generally entail significant design risks, non-recurring costs and time delays. Standard logic products, an alternative to custom designed ASICs, limit a manufacturer’s flexibility to adequately customize an end system. Programmable logic addresses this inherent dilemma. Programmable logic is a standard semiconductor product, purchased by systems manufacturers in a “blank” state, that can be custom configured into a virtually unlimited number of specific logic functions by programming the device with electrical signals. Programmable logic gives system designers the ability to quickly create custom logic functions to provide product differentiation without sacrificing rapid time to market.

According to Gartner1, the programmable logic market was approximately $3.2 billion in 2005. Within this market, there are two main segments, programmable logic devices (“PLDs”) and field programmable gate arrays (“FPGAs”), each representing a distinct silicon architectural approach. Our company believes that in 2005, PLD was a $0.6 billion market while FPGA was a $2.6 billion market. Products based on the two alternative programmable logic architectures are generally optimal for different types of logic functions, although many logic functions can be implemented using either architecture. PLDs are characterized by a regular building block structure of wide-input logic cells, called macrocells, and use a centralized logic interconnect scheme. FPGAs are characterized by a narrow-input logic cell and use a distributed interconnect scheme. FPGAs may also contain dedicated blocks of fixed circuits such as memory, high-speed input/output interface or processors. Although PLDs and FPGAs are typically suited for use in distinct types of logic applications, we believe that a substantial portion of programmable logic customers utilize both PLD and FPGA products.

Lattice Products

We strive to offer innovative and differentiated programmable solutions based on our proprietary technology and intellectual property.

FPGA Products

In 2002, we entered the FPGA market as a result of our acquisition of the FPGA business of Agere. During 2005, approximately 18% of our revenue was derived from FPGA products, as compared to 19% in 2004 and 18% in 2003. In the future, we plan to introduce new families of innovative, high performance FPGAs. The key features of our newest FPGA families are described in the table below:

(1)          Gartner Dataquest, “Semiconductor Forecast Worldwide—Forecast Database,” Nolan Reilly and Richard Gordon, Nov. 14, 2005.

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Our recently announced LatticeSC (System Chip) family of FPGAs combines a high performance FPGA fabric, with many advanced features in a single unique architecture. This family is fabricated using 90nm technology to provide high performance, and includes specific features to meet the needs of today’s high-speed communication system designs. These features include 3.4Gbps serializer/deserializer (“SERDES”) with an advanced embedded Physical Coding Sub-layer (“PCS”), up to 7.8 Mbits of Embedded Block RAM (“EBR”), and dedicated I/O logic to support source synchronous I/O standards such as RapidIO, HyperTransport, SPI4.2, SFI-4, UTOPIA, XGMII and CSIX. Multiple hierarchical clocking and clock management resources are provided to support programmable logic designs needed in today’s high-end system designs. High speed I/O with bandwidths up to 2Gbps per pin are designed for use with high throughput systems. For low cost system level integration, the LatticeSC family offers MACO™ (Masked Array for Cost Optimization) structured ASIC blocks: up to 12 blocks per device with a variety of pre-engineered intellectual property (“IP”) cores.

We also recently introduced the LatticeECP2 family. By integrating features and capabilities previously only available on higher cost/high performance FPGAs, this second generation family expands the range of applications that can take advantage of low cost FPGA products. These integrated features and capabilities include pre-engineered source synchronous I/O for implementation of double data rate (“DDR”) and DDR2 memory interfaces, enhanced configuration options, and high performance multiply, addition, subtract and accumulate digital signal processing (“DSP”) blocks.

The LatticeXP family, introduced in 2005, is a non-volatile FPGA family manufactured using a 130nm embedded flash process co-developed with our foundry partner Fujitsu Limited (“Fujitsu”). Unlike traditional FPGAs that require an external device to load the configuration bitstream, our non-volatile FPGA products embed a flash block on chip to load the bitstream, which offers customers unique benefits with regard to design security, instant-on logic functionality and improved field upgradability.

The LatticeEC/ECP families, introduced in 2004, are 130nm products currently in volume production. These families were designed to support high volume customer applications, which require a low cost FPGA fabric. Additionally, these families provide several important, performance-enhancing features. These features include built-in DDR memory support, a flexible high-performance DSP block and support for industry standard, low cost, SPI-flash boot memories.

PLD Products

During 2005, approximately 82% of our revenue was derived from PLD products, as compared to 81% in 2004 and 82% in 2003. At present, we offer the industry’s broadest line of PLDs based on our numerous families of ispLSI®, ispMACH™ and GAL® products. The key features of our newest PLD families are described in the table below:

The MachXO family of crossover programmable logic devices combines an optimized lookup table (“LUT”) fabric with Lattice’s non-volatile technology to provide the high pin-to-pin performance and instant-on logic functionality associated with PLDs, and the flexibility of FPGAs. This low cost, infinitely reconfigurable family is designed to offer a flexible alternative for applications traditionally served by PLDs or low capacity FPGAs such as bus bridging, bus interface and control.

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In addition to high performance, the ispMACH 4000Z family features an architecture optimized to ensure ultra-low power consumption. Devices within this new family, targeted toward handheld and portable equipment, typically operate using 10-15 microamps of current while in standby mode.

We also offer the industry’s broadest line of low density PLDs, based on our numerous families of GAL products offered in over 200 speed, power, package and temperature range combinations. These devices range in complexity from approximately 200 to 1,000 logic gates and are typically assembled in 20-, 24- and 28-pin standard dual in-line packages and in 20- and 28-pin standard plastic leaded chip carrier packages. We offer the standard 16V8, 20V8 and 22V10 architectures in a variety of speed grades, with propagation delays as low as 3.5 nanoseconds, the highest performance in the industry.

In addition, we have recently introduced the ispPAC®, Power Manager and ispCLOCK™ families of programmable mixed signal devices. These devices, featuring a combination of programmable logic and programmable analog, allow system designers to quickly and easily implement a wide variety of power and clock management functions within a single integrated circuit. Our ispPAC products can replace numerous discrete components while providing customers with additional design flexibility and time to market benefits. We believe these devices provide an opportunity to extend our proprietary technology to an untapped potential market.

Software Development Tools and Intellectual Property Cores

Our products are supported by the ispLEVER® 5.1 software development tool suite and PAC-Designer® software. Supporting the PC, UNIX and LINUX platforms, ispLEVER software allows our customers to enter, verify and synthesize a design, perform logic simulation and timing analysis, assign input/output pins, designate critical paths, debug, execute automatic timing-driven place and route tasks, and download a logic and input/output configuration to our devices. Designed to seamlessly integrate with third-party electronic design automation environments, ispLEVER software provides a front-to-back design flow that leverages a customer’s prior investment in tools offered by Cadence, Mentor Graphics, Synopsys and Synplicity. In the future, we plan to continue to enhance and expand the capability of our software development tool suite.

Lattice’s IP core program (ispLeverCORE™) assists our customers’ design efforts by providing pre-tested, reusable functions that can be easily utilized, allowing our customers to focus on their unique system architectures. These IP cores eliminate the need to “re-invent the wheel,” by providing many industry-standard functions, including PCI, DDR and Ethernet.

Product Development

We place substantial emphasis on new product development and believe that continued investment in this area is required to maintain and improve our competitive position. Our product development activities emphasize new proprietary products, enhancement of existing products and process technologies and improvement of software development tools. Product development activities occur in Hillsboro, Oregon; San Jose, California; Naperville, Illinois; Bethlehem, Pennsylvania; and Shanghai, China. During 2005, we closed three smaller silicon design centers and one software development center, and consolidated the development activities of those centers into our larger facilities.

Research and development expenses were $95.4 million in 2005, $91.0 million in 2004 and $87.1 million in 2003. While we expect to continue to make significant future investments in research and development, we have taken steps to streamline and consolidate our research and development process, the impact of which is reflected in restructuring charges for the fourth quarter of 2005 (see discussion under “Restructuring Charges”).

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Operations

We do not manufacture our own silicon wafers. We maintain strategic relationships with large semiconductor foundries to source our finished silicon wafers. This strategy allows us to focus our internal resources on product, process and market development, and eliminates the fixed cost of owning and operating manufacturing facilities. We are also able to take advantage of the ongoing advanced process technology development efforts of semiconductor foundries. In addition, all of our assembly operations and most of our test operations are performed by outside suppliers. We perform certain test operations and reliability and quality assurance processes internally. We have achieved and maintained ISO 9001 quality certification since 1993, which is an indication of our high internal operational standards.

Wafer Fabrication

We source silicon wafers from our foundry partners, Fujitsu in Japan, Seiko Epson in Japan, United Microelectronics Corporation (“UMC”) in Taiwan and Chartered Semiconductor Manufacturing, Ltd. (“Chartered Semiconductor”) in Singapore, pursuant to agreements with each company and their respective affiliates. We negotiate wafer volumes, prices and other terms with our foundry partners and their respective affiliates on a periodic basis.

Assembly

After wafer fabrication and initial testing, we ship wafers to independent subcontractors for assembly. During assembly, wafers are separated into individual die and encapsulated in plastic or ceramic packages. Presently, we have qualified assembly partners in China, Japan, Malaysia, the Philippines, South Korea and Indonesia. We negotiate assembly prices, volumes and other terms with our assembly partners and their affiliates on a periodic basis.

We currently offer an extensive list of standard products in lead (Pb) free packaging. Our lead-free products are RoHS compliant, meeting the European Parliament Directive entitled “Restrictions on the use of Hazardous Substances” (“RoHS”). We continually review our suppliers to ensure they meet or exceed our packaging requirements.

Testing

We electrically test the die on each wafer prior to shipment for assembly. Following assembly, prior to customer shipment, each product undergoes final testing and quality assurance procedures. Final testing on certain products is performed by independent contractors in China, Japan, Malaysia, the Philippines, South Korea and Indonesia, and at our Oregon facility.

Marketing, Sales and Customers

We sell our products directly to end customers through a network of independent manufacturers’ representatives and indirectly through a network of independent distributors. We also employ a direct sales management and field applications engineering organization to support our end customers and indirect sales resources. Our end customers are primarily original equipment manufacturers in the communications, computing, consumer, industrial, automotive, medical and military end markets.

As of December 2005, we have agreements with 20 manufacturers’ representatives and two primary distributors, Arrow Electronics, Inc. and Avnet Inc., in North America. We have also established export sales channels in over 50 foreign countries through a network of over 30 sales representatives and distributors. The majority of our sales are made through distributors.

We protect both of our primary North American distributors and some of our foreign distributors against reductions in published prices, and expect to continue this policy in the foreseeable future. We also

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allow returns from these distributors of unsold products under certain conditions. For these reasons, we do not recognize revenue until products are resold by these distributors to an end customer.

We provide technical and marketing support to our end customers with engineering staff based at our headquarters, product development centers and selected field sales offices. We maintain numerous domestic and international field sales offices in major metropolitan areas.

Export sales as a percentage of our total revenue were 77% in 2005, 71% in 2004 and 68% in 2003. Export sales to Japan were approximately 15% of revenue in 2005, 14% of revenue in 2004 and 11% of revenue in 2003, while export sales to China were 13% of revenue in both 2005 and 2004 and 10% in 2003. Both export and domestic sales are denominated in U.S. dollars, with the exception of sales to Japan, which are denominated in Yen. If our export sales decline significantly, there would be a material adverse impact on our business and results of operations.

Our products are sold to a large and diverse group of customers. No individual end customer accounted for more than 10% of total revenue in 2005, 2004 or 2003.

Seasonality

In most years, we experience some seasonal trends in the sale of our products. Sales of our products are often stronger in the first months of the year, and often weaker in the summer months. In addition, December is often a weak month for sales. On balance, general economic conditions have a greater impact on our business and financial results than seasonal trends.

Backlog

Our backlog of scheduled and released orders as of December 31, 2005 was approximately $35.5 million, as compared to approximately $25.5 million as of December 31, 2004. This backlog consisted of direct customer and distributor orders scheduled for delivery within the next 90 days. Distributor orders accounted for the majority of the backlog in both periods. Direct customer orders may be changed, rescheduled or cancelled under certain circumstances without penalty prior to shipment. Additionally, distributor orders generally may be changed, rescheduled or cancelled without penalty prior to shipment. Furthermore, certain of our distributor shipments are subject to rights of return and price adjustment. Revenue associated with these distributor shipments is not recognized until the product is resold to an end customer. Typically, the majority of our revenue results from orders placed and filled within the same period. Such orders are referred to as “turns orders.”  By definition, turns orders are not captured in a backlog measurement made at the beginning of a period. We do not anticipate a significant change in this business pattern. For all these reasons, backlog as of any particular date should not be used as a predictor of revenue for any future period.

Competition

The semiconductor industry is intensely competitive and characterized by rapid rates of technological change, product obsolescence and price erosion. Our current and potential competitors include a broad range of semiconductor companies from emerging companies to large, established companies, many of which have greater financial, technical, manufacturing, marketing and sales resources than we do.

The principal competitive factors in the programmable logic market include product features, price, customer support, and sales, marketing and distribution strength. The availability of competitive software development tools and intellectual property cores is also critical. In addition to product features such as density, speed, power consumption, reprogrammability, design flexibility and reliability, competition occurs on the basis of price and market acceptance of specific products and technology. We intend to continue to address these competitive factors by working to continually introduce product enhancements and new

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products, by seeking to establish our products as industry standards in their respective markets, and by working to reduce the manufacturing cost of our products.

We compete directly with Actel Corporation, Altera Corporation and Xilinx Inc., all of whom offer competing products. We also indirectly compete with other semiconductor companies that provide logic solutions that are not user programmable. Although to date we have not experienced direct competition from companies located outside the United States, such companies may become a more significant competitive factor in the future. Competition may also increase if other semiconductor companies seek to expand into our market. Any such increases in competition could have a material adverse effect on our operating results.

Patents

We seek to protect our products and technologies primarily through patents, trade secrecy measures, copyrights, mask work protection, trademark registrations, licensing restrictions, confidentiality agreements and other approaches designed to protect proprietary information. There can be no assurance that others may not independently develop competitive technology not covered by our intellectual property rights or that measures we take to protect our technology will be effective.

We hold numerous domestic, European and Asian patents and have patent applications pending in the United States, Asia and Europe. Our current patents will expire at various times between 2006 and 2023. There can be no assurance that pending patent applications or other applications that may be filed will result in issued patents, or that any issued patents will survive challenges to their validity. Although we believe that our patents have value, there can be no assurance that our patents, or any additional patents that may be issued in the future, will provide meaningful protection from competition. We believe that our success will depend primarily upon the technical expertise, experience, creativity and the sales and marketing abilities of our personnel.

Patent and other proprietary rights infringement claims are common in our industry. There can be no assurance that, with respect to any claim made against us, we could obtain a license on terms or under conditions that would not harm our business.

Licenses and Agreements

Advanced Micro Devices

In 1999, as part of our acquisition of Vantis Corporation, a wholly owned subsidiary of Advanced Micro Devices, Inc. (“AMD”), we entered into an agreement with AMD pursuant to which we have cross-licensed Vantis patents with AMD patents, having an effective filing date on or before June 15, 1999, related to programmable logic products. This cross-license was made on a worldwide, non-exclusive and royalty-free basis. Additionally, as part of our acquisition of Vantis, we acquired certain third-party license rights held by Vantis prior to the acquisition. Included are rights to use certain Xilinx patents to manufacture, market and sell products.

Agere Systems

In 2002, as part of our acquisition of the FPGA business of Agere, we entered into an intellectual property agreement with Agere and Agere Systems Guardian Corporation. Pursuant to this agreement, these Agere companies assigned or licensed to us certain FPGA and FPSC patents, trademarks, software and other intellectual property rights and technology, and we licensed back rights in these same assets. These cross-licenses were made on a worldwide and royalty-free basis.

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Altera

In 2001, we entered into a comprehensive, royalty-free patent cross-license agreement and a multi-year patent peace agreement with Altera.

Fujitsu

On September 10, 2004, we entered into an Advance Payment and Purchase Agreement (the “Fujitsu APP Agreement”) with Fujitsu, pursuant to which we will advance $125.0 million to Fujitsu in support of the development and construction of a new 300mm wafer fabrication facility in Mie, Japan, which is now operational. The initial two payments of $25.0 million each were made in October 2004 and January 2005, with the remaining payments to be made in two stages upon the achievement of certain milestones. We currently anticipate that the achievement of these milestones will occur in the second and third quarters of 2006.

Our $125.0 million advance will be credited against the purchase price of 300mm wafers received from the new wafer fabrication facility. The Fujitsu APP Agreement will continue until the full amount of the advance payment has been returned to us in the form of wafers or other repayment, subject to the right of either party to terminate the agreement upon the occurrence of certain events. We may request a refund of the unused amount of the advance payment if we have not used all of our wafer credits by December 31, 2007. The repayment obligation of Fujitsu is unsecured.

Seiko Epson/Epson Electronics America

Epson Electronics America, Inc. (“EEA”), an affiliated U.S. distributor of Seiko Epson, has agreed to provide us with manufactured wafers in quantities based on six-month rolling forecasts. Prices for the wafers obtained from EEA are reviewed and adjusted periodically. Wafers for our products are manufactured in Japan at Seiko Epson’s wafer fabrication facilities and are delivered to us by EEA.

In 1997 we entered into an advance payment production agreement with Seiko Epson and EEA which was subsequently amended in 2002 and March 2004. Under this agreement we advanced $51.3 million to Seiko Epson to finance construction of an eight-inch sub-micron semiconductor wafer manufacturing facility. The advance is to be repaid with semiconductor wafers over a multi-year period. No interest income is recorded. The agreement calls for wafers to be supplied by Seiko Epson through EEA pursuant to purchase agreements with EEA. Cumulatively, $38.9 million of these payments have been repaid to us in the form of semiconductor wafers. We currently estimate that approximately $12.4 million of the outstanding advances will be repaid with semiconductor wafers during fiscal 2006, and are thus reflected as part of Prepaid expenses and other current assets in our Consolidated Balance Sheet. We are not obligated to make additional payments under this agreement.

UMC Group

In 1995, we entered into a series of agreements with United Microelectronics Corporation (“UMC”), a public Taiwanese company, pursuant to which we agreed to join UMC and several other companies to form a separate Taiwanese corporation, (“UICC”), for the purpose of building and operating an advanced semiconductor manufacturing facility in Taiwan, Republic of China. Under the terms of the agreements, we invested approximately $49.7 million for an approximate 10% equity interest in the corporation and the right to receive a percentage of the facility’s wafer production at market prices.

In 1996, we entered into an agreement with Utek Corporation (“Utek”), a public Taiwanese company in the wafer foundry business that became affiliated with the UMC group in 1998, pursuant to which we agreed to make a series of equity investments in Utek under specific terms. In exchange for these

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investments, we received the right to purchase a percentage of Utek’s wafer production. Under this agreement, we invested approximately $17.5 million. In 2000, UICC and Utek merged into UMC.

We owned approximately 25.7 million shares of UMC common stock at December 31, 2005. Under the terms of the UMC agreement, sales of these shares may result in a reduction of our rights to guaranteed wafer capacity at UMC based on the number of shares that we sell. However, we do not believe that this creates a significant risk with regard to securing adequate wafer capacity at UMC.

For financial reporting purposes, all of our shares of UMC common stock are accounted for as available-for-sale and marked to market in our Consolidated Balance Sheet until they are sold, at which time a gain or loss is recognized in our Consolidated Statement of Operations. Unrealized gains and losses are included in Accumulated other comprehensive (loss) income within Stockholders’ equity. An other than temporary impairment of UMC share value could result in a reduction of the Consolidated Balance Sheet carrying value and would result in a charge to our Consolidated Statement of Operations.

Employees

As of December 31, 2005, we had 909 full-time employees. We believe that our future success will depend, in part, on our ability to continue to attract and retain highly skilled technical and management personnel. None of our employees is subject to a collective bargaining agreement. We have never experienced a work stoppage and consider our employee relations to be good.

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DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT

The following individuals currently serve as our directors and executive officers:

Stephen A. Skaggs joined Lattice in December 1992 as Director, Corporate Development. He was elected Senior Vice President, Chief Financial Officer and Secretary in August 1996. He was elected President in October 2003, Chief Executive Officer in August 2005 and Director in November 2005.

Jan Johannessen rejoined Lattice in October 2001 as Vice President, Investments. In October 2003, he was elected Corporate Vice President and Chief Financial Officer. He originally joined Lattice in 1983 and served as Vice President and Chief Financial Officer between 1987 and 1993. From 1993 to 2001, he worked as an independent venture capitalist. He was elected Senior Vice President in November 2005.

Martin R. Baker joined Lattice in January 1997 as Vice President and General Counsel. He was elected Secretary in August 2005 and Corporate Vice President in November 2005. From 1991 until he joined Lattice, Mr. Baker held legal positions with Altera Corporation.

Stephen M. Donovan joined Lattice in October 1989 and served as Director of Marketing and Director of International Sales. He was elected Vice President, International Sales in August 1993. He was promoted to Corporate Vice President, Sales in May 1998. Mr. Donovan has worked in the programmable logic industry since 1982.

Patrick S. Jones joined our Board of Directors in February 2005. Mr. Jones is the former Chief Financial Officer of Gemplus SA and former Vice President, Finance and Corporate Controller of Intel Corporation. He was also previously Chief Financial Officer of LSI Logic Corporation. He was elected Chairman of the Board in August 2005. Mr. Jones also serves as a director of Genesys SA.

David E. Coreson joined our Board of Directors in February 2005. Mr. Coreson is the former Senior Vice President of Tektronix where his responsibilities included worldwide manufacturing, worldwide customer service, central engineering, Tek-Japan, Tek-China and MaxTek, a wholly owned subsidiary of Tektronix which manufactures custom hybrids.

Daniel S. Hauer has been a member of our Board of Directors since 1987. Mr. Hauer served as the Chairman of the Board and Chief Executive Officer of Epson Electronics America, Inc. until November 1998. Since that time, Mr. Hauer has worked as a business consultant.

Soo Boon Koh joined our Board of Directors in August 2000. Ms. Koh has served as Managing Partner of iGlobe Partners Fund, L.P., a venture capital firm located in Singapore and the United States, since October 1999. She previously served as Senior Vice President and Deputy General Manager of Vertex Management Pte., Ltd. until June 1999.

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Balaji Krishnamurthy joined our Board of Directors in December 2005. Mr. Krishnamurthy served as Chairman, President and Chief Executive Officer of Planar Systems, Inc. until September 2005.

Harry A. Merlo was a founding member of our Board of Directors in 1983. Mr. Merlo has been the President of Merlo Corporation since July 1995. He was the founding President and previously served as the President and Chairman of the Board of Louisiana-Pacific Corporation until June 1995.

Gerhard H. Parker joined our Board of Directors in December 2005. Mr. Parker previously served as Executive Vice President of Intel Corporation. Mr. Parker also serves as a director of Applied Materials Inc. and FEI Co.

Available Information

We make available free of charge through our website at www.latticesemi.com, via a link to the SEC’s website at www.sec.gov, our annual reports on Form 10-K, quarterly reports on Form 10-Q and current reports on Form 8-K and amendments to those reports as soon as reasonably practicable after such materials are electronically filed with, or furnished to, the SEC. You may also obtain free copies of these materials by contacting our Investor Relations Department at 5555 N.E. Moore Court, Hillsboro, Oregon 97124-6421, telephone (503) 268-8000.

Item 1A. Risk Factors.

The following risk factors and other information included in this Annual Report should be carefully considered. The risks and uncertainties described below are not the only ones we face. Additional risks and uncertainties not presently known to us or that we currently deem immaterial also may impair our business operations. If any of the following risks occur, our business, financial condition, operating results, and cash flows could be materially adversely affected.

We may be unsuccessful in defining, developing or selling the new FPGA products required to maintain or expand our business.

As a semiconductor company, we operate in a dynamic environment marked by rapid product obsolescence. The programmable logic market is characterized by rapid technology and product evolution and in recent years the market for FPGA products has grown faster than the market for PLD products. Currently we derive a greater proportion of our revenue from PLD products than FPGA products. Consequently, our future success depends on our ability to introduce new FPGA and associated software design tool products that meet evolving customer needs while achieving acceptable margins. We are presently shipping our next generation FPGA product families that are critical to our ability to grow our FPGA product revenue and expand our overall revenue. We also plan to continue upgrading our customer design tool products and increase our offerings of intellectual property cores. If we fail to introduce new products in a timely manner, or if these products or future new products fail to achieve market acceptance, our operating results would be harmed.

Fujitsu Limited has agreed to manufacture our current and future FPGA products on its 130 nanometer and 90 nanometer CMOS process technologies, as well as on a 130 nanometer technology with embedded flash memory that we have jointly developed with Fujitsu. The success of our next generation FPGA products is dependent on our ability to successfully partner with Fujitsu. If for any reason we are unsuccessful in our efforts to partner with Fujitsu in connection with these next generation FPGA products, our future revenue growth would be materially adversely affected.

The introduction of new silicon and software design tool products in a dynamic market environment presents significant business challenges. Product development commitments and expenditures must be

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made well in advance of product sales. The market reception of new products depends on accurate projections of long-term customer demand, which by their nature are uncertain.

Our future revenue growth is dependent on market acceptance of our new silicon and software design tool products and the continued market acceptance of our current products. The success of these products is dependent on a variety of specific technical factors including:

·       successful product definition;

·       timely and efficient completion of product design;

·       timely and efficient implementation of wafer manufacturing and assembly processes;

·       product performance;

·       product cost; and

·       the quality and reliability of the product.

If, due to these or other factors, our new silicon and software products do not achieve market acceptance, our operating results would be harmed.

Our products may not be competitive if we are unsuccessful in migrating our manufacturing processes to more advanced technologies or alternative fabrication facilities.

To develop new products and maintain the competitiveness of existing products, we need to migrate to more advanced wafer manufacturing processes that use larger wafer sizes and smaller device geometries. We also may need to use additional foundries. Because we depend upon foundries to provide their facilities and support for our process technology development, we may experience delays in the availability of advanced wafer manufacturing process technologies at existing or new wafer fabrication facilities. As a result, volume production of our advanced process technologies at the fabs of Fujitsu, Seiko Epson, UMC or future foundries may not be achieved. This could harm our operating results. Currently, and expected to continue in the foreseeable future, our newest FPGA products are manufactured by Fujitsu.

A downturn in the communications equipment end market or computing end market could cause a reduction in demand for our products and limit our ability to maintain revenue levels and operating results.

The majority of our revenue is derived from customers in the communications equipment and computing end markets. Any deterioration in these end markets or any reduction in technology capital spending could lead to a reduction in demand for our products. For example, in the past, a general weakening in demand for programmable logic products from customers in the communications end market has adversely affected our revenue. Whenever adverse economic or end market conditions exist, there is likely to be an adverse effect on our operating results.

The cyclical nature of the semiconductor industry may limit our ability to maintain revenue levels and operating results during industry downturns.

The semiconductor industry is highly cyclical, to a greater extent than other less technology-driven industries. Our financial performance has periodically been negatively affected by downturns in the semiconductor industry. Factors that contribute to these industry downturns include:

·       the cyclical nature of the demand for the products of semiconductor customers;

·       general reductions in inventory levels by customers;

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·       excess production capacity;

·       general decline in end-user demand; and

·       accelerated declines in average selling prices.

Historically, the semiconductor industry has experienced periodic downturns of varying degrees of severity and duration. Typically, after such downturns, semiconductor industry conditions improve, although such improvement may not be significant or sustainable. Increased demand for semiconductor industry products may not proportionately increase demand for programmable logic products in general, or our products in particular. Even if demand for our products increases, average sales prices for our products may not increase, and could decline. Whenever adverse semiconductor industry conditions or other similar conditions exist, there is likely to be an adverse effect on our operating results.

Further, our ability to predict end-user demand is limited. Typically, the majority of our revenue comes from “turns orders,” which are orders placed and filled within the same quarter. By definition, turns orders are not captured in a backlog measurement at the beginning of a quarter. Accordingly, we cannot use backlog as a reliable measure of predicting revenue.

The potential impact of customer design-in activity on future revenue is inherently uncertain because it is unknown whether any particular customer design-in will ultimately result in sales of a significant volume, and, if a particular customer design-in does result in such sales, when such sales will ultimately occur and the amount of such sales.

We face uncertainties relating to the potential impact of customer design-in activity because it is unknown whether any particular customer design activity will ultimately result in sales of significant volume, and, if customer design activity does result in such sales, when such sales will ultimately occur and what the amount of such sales will be. Measurements of customer design-in activity, such as “design-ins” and “design-wins,” are inherently imprecise as it is not possible to predict which designs will ultimately be mass produced, when such production may occur, or whether company products will be used in volume production. We may not be able to accurately manage production of products or predict sales of products, and, thus, our revenue levels may not match our product production.

Our wafer supply could be interrupted or reduced, which may result in a shortage of products available for sale.

We do not manufacture finished silicon wafers and many of our products, including all of our newest FPGA products, are manufactured by a sole source. Currently, our silicon wafers are manufactured by Fujitsu in Japan, Seiko Epson in Japan, UMC in Taiwan and Chartered Semiconductor in Singapore. If any of our current or future foundry partners significantly interrupts or reduces our wafer supply, our operating results could be harmed.

In the past, we have experienced delays in obtaining wafers and in securing supply commitments from our foundries. At present, we anticipate that our supply commitments are adequate. However, these existing supply commitments may not be sufficient for us to satisfy customer demand in future periods. Additionally, notwithstanding our supply commitments, we may still have difficulty in obtaining wafer deliveries consistent with the supply commitments. We negotiate wafer prices and supply commitments from our suppliers on at least an annual basis. If any of our foundry partners were to reduce its supply commitment or increase its wafer prices, and we cannot find alternative sources of wafer supply, our operating results could be harmed.

Many other factors that could disrupt our wafer supply are beyond our control. Since worldwide manufacturing capacity for silicon wafers is limited and inelastic, we could be harmed by significant industry-wide increases in overall wafer demand or interruptions in wafer supply. Additionally, a future

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disruption of any of our foundry partners’ foundry operations as a result of a fire, earthquake, act of terrorism, political unrest, governmental uncertainty, war, or other natural disaster or catastrophic event could disrupt our wafer supply and could harm our operating results.

If our foundry partners experience quality or yield problems, we may face a shortage of products available for sale.

We depend on our foundries to deliver reliable silicon wafers with acceptable yields in a timely manner. As is common in our industry, we have experienced wafer yield problems and delivery delays. If our foundries are unable for a prolonged period to produce silicon wafers that meet our specifications, with acceptable yields, our operating results could be harmed.

The reliable manufacture of high performance programmable logic devices is a complicated and technically demanding process requiring:

·       a high degree of technical skill;

·       state-of-the-art equipment;

·       the availability of certain basic materials and supplies, such as chemicals, gases, polysilicon, silicon wafers and ultra-pure metals;

·       the absence of defects in production wafers;

·       the elimination of minute impurities and errors in each step of the fabrication process; and

·       effective cooperation between the wafer supplier and us.

As a result, our foundries may experience difficulties in achieving acceptable quality and yield levels when manufacturing our silicon wafers.

Our supply of assembled and tested products could be interrupted or reduced, which may result in a shortage of products available for sale.

We do not assemble our finished products or perform all testing of our products. Currently, our finished products are assembled and tested by Amkor in the Philippines and South Korea, ASE in Malaysia, STATS/ChipPAC in China, Fujitsu in Japan, and other independent contractors in Asia. If any of our current or future assembly or test contractors significantly interrupts or reduces our supply of assembled and tested devices, our operating results could be harmed.

In the past, we have experienced delays in obtaining assembled and tested products and in securing assembly and test capacity commitments from our suppliers. At present, we anticipate that our assembly and test capacity commitments are adequate. However, these existing commitments may not be sufficient for us to satisfy customer demand in future periods. Additionally, notwithstanding our assembly and test capacity commitments we may still have difficulty in obtaining deliveries of finished products consistent with the capacity commitments. We negotiate assembly and test prices and capacity commitments from our contractors on a periodic basis. If any of our assembly or test contractors were to reduce its capacity commitment or increase its prices, and we cannot find alternative sources, our operating results could be harmed.

Many other factors that could disrupt our supply of finished products are beyond our control. Since worldwide capacity for assembly and testing of semiconductor products is limited and inelastic, we could be harmed by significant industry-wide increases in overall demand or interruptions in supply. The assembly of complex packages requires a consistent supply of a variety of raw materials such as substrates, leadframes, and mold compound. The worldwide manufacturing capacity for these materials is limited and inelastic. A significant industry-wide increase in demand, or interruptions in the supply of these materials

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to our assembly/test contractors, could harm our operating results. Additionally, a future disruption of any of our assembly or test contractors’ operations as a result of a fire, earthquake, act of terrorism, political unrest, governmental uncertainty, war, or other natural disaster or catastrophic event could disrupt our supply of assembled and tested devices and could harm our operating results.

In addition, our quarterly revenue levels may be affected to a significant extent by our ability to match inventory and current production mix with the product mix required to fulfill orders. The large number of individual parts we sell and the large number of customers for our products, combined with limitations on our and our customer’s ability to forecast orders accurately and our relatively lengthy manufacturing cycles, may make it difficult to achieve a match of inventory on hand, production units, and shippable orders sufficient to realize quarterly or annual revenue projections.

If our assembly and test supply contractors experience quality or yield problems, we may face a shortage of products available for sale.

We rely on contractors to assemble and test our devices with acceptable quality and yield levels. As is common in our industry, we have experienced quality and yield problems in the past. If we experience prolonged quality or yield problems in the future, our operating results could be harmed.

The majority of our revenue is derived from semiconductor devices assembled in advanced packages. The assembly of advanced packages is a complex process requiring:

·       a high degree of technical skill;

·       state-of-the-art equipment;

·       the absence of defects in assembly and packaging manufacturing;

·       the elimination of raw material impurities and errors in each step of the process; and

·       effective cooperation between the assembly contractor and us.

As a result, our contractors may experience difficulties in achieving acceptable quality and yield levels when assembling and testing our semiconductor devices.

Conditions in Asia may disrupt our existing supply arrangements and result in a shortage of finished products available for sale.

All of our major silicon wafer suppliers operate fabs located in Asia. Additionally, our finished silicon wafers are assembled and tested by independent contractors located in China, Japan, Malaysia, the Philippines and South Korea. Economic, financial, social and political conditions in Asia have historically been volatile. Financial difficulties, the effects of currency fluctuation, governmental actions or restrictions, prolonged work stoppages, political unrest, war, natural disaster or any other difficulties experienced by our suppliers may disrupt our supply and could harm our operating results.

Export sales account for the majority of our revenues and may decline in the future due to economic and governmental uncertainties.

Our export sales are affected by unique risks frequently associated with foreign economies including:

·        changes in local economic conditions;

·        exchange rate volatility;

·        governmental controls and trade restrictions;

·        export license requirements and restrictions on the export of technology;

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·        political instability, war or terrorism;

·        changes in tax rates, tariffs or freight rates;

·        interruptions in air transportation; and

·        difficulties in staffing and managing foreign sales offices.

Our future quarterly operating results may fluctuate and therefore may fail to meet expectations.

Our quarterly operating results have fluctuated in the past and may continue to fluctuate. Consequently, our operating results may fail to meet the expectations of analysts and investors. As a result of industry conditions and the following specific factors, our quarterly operating results are more likely to fluctuate and are more difficult to predict than a typical non-technology company of our size and maturity:

·       general economic conditions in the countries where we sell our products;

·       conditions within the end markets into which we sell our products;

·       the cyclical nature of demand for our customers’ products;

·       excessive inventory accumulation by our end customers;

·       the timing of our and our competitors’ new product introductions;

·       product obsolescence;

·       the scheduling, rescheduling and cancellation of large orders by our customers;

·       the willingness and ability of our customers and distributors to make payment to us in a timely manner;

·       our ability to develop new process technologies and achieve volume production at the fabs of Fujitsu, Seiko Epson, UMC, Chartered Semiconductor or at other foundries;

·       changes in manufacturing yields including delays in achieving target yields on new products;

·       adverse movements in exchange rates, interest rates or tax rates; and

·       the availability of adequate supply commitments from our wafer foundries and assembly and test subcontractors.

Our quarterly results may also fluctuate as a result of the legal expenses accrued in any given period in connection with the pending shareholder class action suit and the Securities and Exchange Commission’s ongoing informal inquiry. As a result of these factors, our past financial results are not necessarily a good predictor of our future results.

We may have failed to adequately insure against certain risks, and, as a result, our financial condition and results may be adversely affected.

We carry insurance customary for companies in our industry, including, but not limited to, liability, property and casualty, worker’s compensation and business interruption insurance. We also carry basic medical insurance, subject to a true insurance stop loss for catastrophic illness. In addition, we have insurance contracts that provide director and officer liability coverage for our directors and officers. Other than the specific areas mentioned above, we are self-insured with respect to most other risks and exposures, and the insurance we carry in many cases is subject to a significant policy deductible or other limitation before coverage applies. Based on management’s assessment and judgment, we have determined that it is more cost effective to self-insure against certain risks than to incur the insurance premium costs. The risks and exposures for which we self-insure include, but are not limited to, natural disasters, product

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defects, political risk, theft, patent infringement and some employment practice matters. Should there be a catastrophic loss due to an uninsured event such as an earthquake or a loss due to adverse occurrences in any area in which we are self-insured, our financial condition, results of operations and liquidity may be adversely affected.

We may not realize the expected benefits of our corporate restructuring, which may adversely affect our financial conditions and operating results.

In October 2005, we announced a corporate restructuring to consolidate operations, streamline engineering functions and lower operating expenses. We also announced a voluntary separation program for certain employees. As a result of these actions, we reduced total headcount by approximately 14%. We currently estimate that the restructuring will result in a reduction in our operating expenses, effective in the first quarter of 2006, of an estimated $3.5 million to $4.5 million per quarter. Remaining costs to complete the restructuring will be recorded in future periods as incurred and are not expected to be significant. Although the restructuring was substantially completed during the fourth quarter of 2005, we cannot be certain as to the actual amount of any remaining restructuring charges or the timing of their recognition for financial reporting purposes. The benefits of the restructuring may not materialize for a number of reasons, including the possibility that we may incur unanticipated costs in closing facilities or consolidating our operations. In addition, we expect that a portion of the estimated reduction in our operating expenses resulting from the restructuring will be offset by other operating expenses, including stock compensation expense that we will recognize beginning in the first quarter of 2006 as a result of the adoption of SFAS No. 123R. If we are unsuccessful in realizing the benefits of our restructuring plan, we may experience disruptions in our operations and higher ongoing costs, which may adversely affect our operating results.

We face risks related to pending litigation and an ongoing informal inquiry by the Securities and Exchange Commission.

In September and October 2004, three putative class action complaints were filed in the United States District Court for the District of Oregon against Lattice Semiconductor Corporation, our Chief Executive Officer and President Stephen A. Skaggs, and our former Chief Executive Officer Cyrus Y. Tsui. These complaints were filed on behalf of a putative class of investors who purchased our stock between April 22, 2003 and April 19, 2004. They generally allege violations of federal securities laws arising out of our previously announced restatement of financial results for the first, second, and third quarters of 2003. Consistent with the usual procedures for cases of this kind, these cases were amended and consolidated into a single action. In an amended and consolidated complaint filed January 27, 2005 our former President and our former Controller were added as defendants. The complaints generally seek an unspecified amount of damages, as well as attorney fees and costs. We believe that the complaints are without merit, and we intend to vigorously defend against the lawsuits. The cases are still in the preliminary stages, and it is not possible for us to quantify the extent of our potential liability, if any. An unfavorable outcome in any of these matters could have a material adverse effect on our business, our liquidity and our financial results. In addition, defending any litigation may be costly and divert management’s attention from the day-to-day operations of our business.

On June 14, 2005, we announced that our Audit Committee, in connection with its responsibilities for financial oversight, was conducting an internal examination. The examination concerned issues primarily associated with executive compensation and several items pertaining to our internal controls. On August 9, 2005, we announced that the Audit Committee had concluded the examination. We have furnished information regarding the matters examined by the Audit Committee to the Securities and Exchange Commission, which is conducting an ongoing informal inquiry into our prior restatement of financial results. On September 30, 2005 the Securities and Exchange Commission issued a Cease and Desist Order

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concerning our former Controller, and referenced certain events in connection with our prior restatement of financial results. We are cooperating fully with the Securities and Exchange Commission and intend to continue to do so. We cannot predict the duration or outcome of the Securities and Exchange Commission’s inquiry. If the Securities and Exchange Commission expands its informal inquiry or decides to pursue enforcement action against us, or any other governmental agency or regulatory body takes similar action, our management could be distracted, we could incur substantial costs and there could be a material adverse effect on our business.

We are exposed to certain asserted and unasserted potential claims. There can be no assurance that, with respect to potential claims made against us, we could resolve such claims under terms and conditions that would not have a material adverse effect on our business, our liquidity or our financial results.

If we are unable to effectively and efficiently implement our plan to improve our internal controls there could be a material adverse effect on our operations or financial results.

We received notice from our independent registered public accounting firm that, in connection with the 2003 year-end audit, the independent registered public accounting firm identified a material weakness in our internal controls and procedures relating to separation of duties and establishment of standards for review of journal entries and related file documentation. We have implemented various initiatives that have remedied this material weakness.

During our 2004 year-end financial statement closing, we identified a significant deficiency in our internal controls relating to a mechanical error in calculating a unique inventory allowance, which occurred because newly assigned employees did not recognize that the required allowance had been calculated and recorded by existing procedures. The error was not present in previously issued financial statements and was corrected before the year-end financial statements were issued. Additional training and review procedures have been instituted to remedy this deficiency. During 2005, we performed additional training as well as identified ways to modify and automate our inventory compilation processes to make them less vulnerable to manual errors.

On August 9, 2005, we announced that our Audit Committee had completed its previously announced examination, which concerned issues primarily associated with executive compensation and several items pertaining to our internal controls. In connection with the completion of its examination, the Audit Committee recommended, and the Board of Directors adopted, a number of recommended enhancements to our policies and procedures, including internal control procedures, which are described in Item 9A of this report.

No assurance can be given that we will be able to successfully implement our revised internal controls and procedures and the recently adopted enhancements, or that our revised controls and procedures or enhancements will have the desired effect. In addition, we may be required to hire additional employees, and may experience higher than anticipated capital expenditures and operating expenses, during the implementation of these changes and thereafter. Furthermore, future assessments of our internal controls and procedures may reveal new material weaknesses or significant deficiencies. If we are unable to implement these changes to our internal controls and procedures effectively or efficiently, or if we discover additional material weaknesses or significant deficiencies, there could be a material adverse effect on our operations or financial results.

Changes in accounting for equity compensation will adversely affect our consolidated statement of operations and could adversely affect our ability to attract and retain employees.

We have historically used stock options as a key component of employee compensation in order to align employees’ interests with the interests of our stockholders, encourage employee retention, and provide competitive compensation packages. The Financial Accounting Standards Board has adopted

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changes to generally accepted accounting principles that require us and other companies to record a charge to earnings for employee stock option grants and other equity incentives beginning in the quarter ended March 31, 2006. To the extent that these or other new regulations make it more difficult or expensive to grant options to employees, we will incur increased compensation costs. We may also change our equity compensation strategy, and this could make it difficult to attract, retain and motivate employees. Any of these results could materially and adversely affect our business.

Our stock price may continue to experience large fluctuations.

In recent years, the price of our common stock has fluctuated greatly. These price fluctuations have been rapid and severe and have left investors little time to react. The price of our common stock may continue to fluctuate greatly in the future due to a variety of company specific factors, including:

·       quarter-to-quarter variations in our operating results;

·       shortfalls in revenue or earnings from levels expected by investors;

·       announcements of technological innovations or new products by other companies; and

·       any developments in the pending shareholder class action suit and the Securities and Exchange Commission’s informal inquiry.

At December 31, 2005, our book value per share was $4.38 compared to our stock price, which has ranged from a low of $3.85 per share to a high of $5.79 per share for fiscal 2005. Presently, our stock price is trading slightly above our consolidated book value. Should our stock price drop below book value for a sustained period, it may become necessary to record an impairment charge to goodwill, which would reduce our results of operations.

We may not be able to successfully compete in the highly competitive semiconductor industry.

The semiconductor industry is intensely competitive and many of our direct and indirect competitors have substantially greater financial, technological, manufacturing, marketing and sales resources. If we are unable to compete successfully in this environment, our future results will be adversely affected.

The current level of competition in the programmable logic market is high and may increase in the future. We currently compete directly with companies that have licensed our technology or have developed similar products. We also compete indirectly with numerous semiconductor companies that offer products based on alternative technical solutions. These direct and indirect competitors are established multinational semiconductor companies as well as emerging companies.

We may fail to retain or attract the specialized technical and management personnel required to successfully operate our business.

To a greater degree than most non-technology companies or larger technology companies, our future success depends on our ability to attract and retain highly qualified technical and management personnel. As a mid-sized company, we are particularly dependent on a relatively small group of key employees. Competition for skilled technical and management employees is intense within our industry. As a result, we may not be able to retain our existing key technical and management personnel. In addition, we may not be able to attract additional qualified employees in the future. If we are unable to retain existing key employees or are unable to hire new qualified employees, our operating results could be adversely affected.

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If we are unable to adequately protect our intellectual property rights, our financial results and competitive position may suffer.

Our success depends in part on our proprietary technology. However, we may fail to adequately protect this technology. As a result, we may lose our competitive position or face significant expense to protect or enforce our intellectual property rights.

We intend to continue to protect our proprietary technology through patents, copyrights and trade secrets. Despite this intention, we may not be successful in achieving adequate protection. Claims allowed on any of our patents may not be sufficiently broad to protect our technology. Patents issued to us also may be challenged, invalidated or circumvented. Finally, our competitors may develop similar technology independently.

Companies in the semiconductor industry vigorously pursue their intellectual property rights. If we become involved in protracted intellectual property disputes or litigation we may be forced to use substantial financial and management resources, which could have an adverse effect on our operating results.

Our industry is characterized by frequent claims regarding patents and other intellectual property rights of others. We have been, and from time-to-time expect to be, notified of claims that we are infringing the intellectual property rights of others. If any third party makes a valid claim against us, we could face significant liability and could be required to make material changes to our products and processes. In response to any claims of infringement, we may seek licenses under patents that we are alleged to be infringing. However, we may not be able to obtain a license on favorable terms, or at all, without our operating results being adversely affected.

Our marketable securities, which we hold for strategic reasons, are subject to equity price risk and their value may fluctuate.

Currently we hold substantial equity in UMC, which we acquired as part of a strategic investment to obtain certain manufacturing rights. The market price and valuation of these equity shares has fluctuated widely due to business, stock market or other conditions over which we have little control. During 2001, we recorded a pre-tax impairment loss related to this investment.

In the future, UMC common stock may continue to experience significant price volatility. In 2004 and 2005, we sold the majority of our UMC shares, but have otherwise not attempted to reduce or eliminate this equity price risk through hedging or similar techniques. As a result, substantial, sustained changes in the market price of UMC common stock could impact our financial results.

Item 1B. Unresolved Staff Comments.

None.

Item 2. Properties.

Our corporate headquarters consists of land and 200,000 square feet of buildings we own in Hillsboro, Oregon. We also own two research and development facilities totaling 29,000 square feet and approximately 6,000 square feet of dormitory facilities in Shanghai, China. We currently lease a 133,000 square foot research and development facility in San Jose, California through 2008, a 6,400 square foot research and development facility in Illinois through August 2007, and a 36,000 square foot research and development facility in Pennsylvania through August 2009. We also lease office facilities in multiple metropolitan locations for our domestic and international sales staff. We believe that our existing facilities are suitable and adequate for our current and foreseeable future needs.

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Additionally, we lease (through April 2006) an 84,000 square foot facility in Sunnyvale, California that has been subleased to a third party through the end of the lease term, a 25,000 square foot research and development facility in Austin, Texas through 2011, a 7,500 square foot research and development facility in the United Kingdom through 2013, a 6,300 square foot research and development facility in Colorado through 2007, and a 13,400 square foot research and development facility in Utah through January, 2008. As part of our restructuring plan (see also discussion under “Restructuring Charges”), we ceased our research and development operations in Texas, Colorado, Utah and the United Kingdom in December 2005. We are currently negotiating either to sublease or to terminate the lease agreement at each of these locations.

Item 3. Legal Proceedings.

In September and October 2004, three putative class action complaints were filed in the United States District Court for the District of Oregon against Lattice Semiconductor Corporation, our Chief Executive Officer and President Stephen A. Skaggs, and our former Chief Executive Officer Cyrus Y. Tsui. These complaints were filed on behalf of a putative class of investors who purchased our stock between April 22, 2003 and April 19, 2004. They generally allege violations of federal securities laws arising out of our previously announced restatement of financial results for the first, second, and third quarters of 2003. Consistent with the usual procedures for cases of this kind, these cases were amended and consolidated into a single action. In an amended and consolidated complaint filed January 27, 2005 our former President and our former Controller were added as defendants. The complaints generally seek an unspecified amount of damages, as well as attorney fees and costs. We believe that the complaints are without merit, and we intend to vigorously defend against the lawsuits. The cases are still in the preliminary stages, and it is not possible for us to quantify the extent of our potential liability, if any. An unfavorable outcome in any of these matters could have a material adverse effect on our business, our liquidity and our financial results. In addition, defending any litigation may be costly and divert management’s attention from the day-to-day operations of our business.

On June 14, 2005, we announced that our Audit Committee, in connection with its responsibilities for financial oversight, was conducting an internal examination. The examination concerned issues primarily associated with executive compensation and several items pertaining to our internal controls. On August 9, 2005, we announced that the Audit Committee had concluded the examination. We have furnished information regarding the matters examined by the Audit Committee to the Securities and Exchange Commission, which is conducting an ongoing informal inquiry into our prior restatement of financial results. On September 30, 2005 the Securities and Exchange Commission issued a Cease and Desist Order concerning our former Controller, and referenced certain events in connection with our prior restatement of financial results. We are cooperating fully with the Securities and Exchange Commission and intend to continue to do so. We cannot predict the duration or outcome of the Securities and Exchange Commission’s inquiry. If the Securities and Exchange Commission expands its informal inquiry or decides to pursue enforcement action against us, or any other governmental agency or regulatory body takes similar action, our management could be distracted, we could incur substantial costs and there could be a material adverse effect on our business.

In September and October 2004, two shareholder derivative complaints were filed, purportedly on behalf of Lattice Semiconductor Corporation, in the Circuit Court of the State of Oregon for the County of Washington, against all members of the Board of Directors at the time, certain former directors, and certain executive officers. The derivative plaintiffs made allegations substantially similar to those in the putative class action complaints, as well as allegations of breach of fiduciary duty, abuse of control, gross mismanagement, waste of corporate assets, and unjust enrichment. Consistent with the usual procedures for cases of this kind, these cases were consolidated into a single putative shareholder derivative action. On April 1, 2005, an amended and consolidated complaint was filed. The Board of Directors of the Company

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appointed a Special Litigation Committee (“SLC”) for the purpose of conducting a review and examination of the claims contained in the shareholder derivative complaints. In December 2005, the SLC agreed with counsel for the derivative plaintiffs on a settlement of the derivative action on terms that, among other things, provided for our Board of Directors to adopt specified corporate governance changes, for the dismissal with prejudice of all claims asserted by the derivative plaintiffs, and for the payment of plaintiffs’ counsel’s fees and expenses. The stipulation of settlement entered into by the parties of the settled shareholder derivative litigation did not contain any finding of fault or admission of wrongdoing or liability on the part of the Company or any of the individual defendants in the litigation. Such settlement was approved by the Circuit Court and the derivative litigation was dismissed on January 30, 2006. The agreed upon corporate governance changes, and additional corporate governance changes initiated by the Board of Directors, were adopted by the Board of Directors on January 31, 2006, and are included in the Corporate Governance Policies described under Item 9A of this report.

We are exposed to certain asserted and unasserted potential claims. There can be no assurance that, with respect to potential claims made against us, we could resolve such claims under terms and conditions that would not have a material adverse effect on our business, our liquidity or our financial results.

Item 4. Submission of Matters to a Vote of Security Holders.

Not applicable.

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PART II

Item 5. Market for the Registrant’s Common Stock, Related Stockholder Matters, and Issuer Purchases of Equity Securities.

Market Information

Our common stock is traded on the over-the-counter market and prices are quoted on the Nasdaq National Market under the symbol “LSCC.”  The following table sets forth the low and high intraday sale prices for our common stock for the last two fiscal years, as reported by the Nasdaq National Market.

Holders

As of March 7, 2006, we had approximately 441 stockholders of record.

Dividends

The payment of dividends on our common stock is within the discretion of our Board of Directors. We intend to retain earnings to finance the growth of our business. We have never paid cash dividends.

Recent Sales of Unregistered Securities

None.

Issuer Purchases of Equity Securities

None.

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Item 6. Selected Financial Data.

(1)          Includes $1,817, $3,418, $5,745, $2,962 and $397 of amortization of deferred stock compensation expense for the years ended December 31, 2005, December 31, 2004, December 31, 2003, December 31, 2002, and December 31, 2001, respectively, attributable to research and development activities.

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Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations.

Lattice Semiconductor Corporation designs, develops and markets high performance programmable logic products and related software. Programmable logic products are widely used semiconductor components that can be configured by the end customer as specific logic circuits, and thus enable shorter design cycle times and reduced development costs. Within this market there are two groups of products—programmable logic devices (“PLDs”) and field programmable gate arrays (“FPGAs”)—each representing a distinct silicon architectural approach. Products based on the two alternative programmable logic architectures are generally optimal for different types of logic functions, although many logic functions can be implemented using either architecture. We believe that a substantial portion of programmable logic customers utilize both PLD and FPGA architectures. Our end customers are primarily original equipment manufacturers in the communications, computing, industrial, consumer, automotive, medical and military markets.

Overview of 2005

Revenue for our business in 2005 decreased to $211.1 million as compared to $225.8 million in 2004 due to the decline in our Mainstream* and Mature* products, which was partially offset by growth of our New* products. Additionally, there was a decline in business conditions beginning in the third quarter of 2004 attributable to general weakening in the communications end market, which began to improve at a slow pace in the first quarter of 2005 and continued to improve slowly through the end of 2005. Revenue for 2004 increased as compared to $209.7 million in 2003 due to growth of our New* products, which was partially offset by a decline in revenues from Mature* products. Among other things, future revenue growth is dependent on overall economic conditions for our industry and market acceptance of our new FPGA products.

Our gross margin in 2005 was 55% for the year as compared to 57% in 2004 and 2003, primarily attributable to lower production yields and average selling prices on our new products and an inventory write down. In the fourth quarter of 2005 we recorded a charge to cost of sales related to the initiation of a last-time buy program to obsolete certain mature products. Gross margin may be adversely affected in the future due to product mix shifts, competitive pricing pressure, manufacturing yield issues and wafer and assembly pricing.

Research and development expenses increased to $95.4 million (45% of revenue) in 2005 compared to $91.0 million (40% of revenue) in 2004 and $87.1 million (41% of revenue) in 2003. Research and development spending is predominantly related to the continued development of next generation FPGA products. Although we expect to continue to make significant future investments in research and development, we have taken steps to streamline and consolidate our research and development process, the impact of which is reflected in restructuring charges for the fourth quarter of 2005. See Note 9 to our Consolidated Financial Statements for further discussion.

Selling, general and administrative expenses were $57.5 million (27% of revenue) in 2005 as compared to $53.8 million (24% of revenue) in 2004 and $50.8 million (24% of revenue) in 2003. Expenses increased in both 2005 and 2004 primarily due to legal expenses related to the pending shareholder class action suit, the Securities and Exchange Commission’s ongoing informal inquiry, and the settled shareholder derivative suit, SLC investigation and Audit Committee investigation. Legal expenses related to these matters resulted in a total charge of $6.3 million during 2005 compared to $1.6 million in 2004. These increases are partially offset by decreases primarily in consulting services, sales related expenses and other miscellaneous items. To the extent our revenue continues to grow, we expect that there will be a less than proportionate increase in our selling, general and administrative expenses.

Amortization of intangible assets decreased significantly to $16.2 million in 2005 as compared to $47.2 million in 2004 and $77.1 million in 2003, as amortization of intangible assets acquired in the Vantis

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acquisition was completed in the June 2004 quarter. Amortization for the remaining intangible assets is expected to be $10.8 million in 2006.

Restructuring charges of $11.9 million in 2005 include $6.1 million of severance related costs, $2.5 million of lease related costs and $3.3 million of other costs, including a $2.7 million write-off of an intellectual property license. The restructuring plan was initiated during the fourth quarter of 2005 and was substantially complete by December 31, 2005. We currently estimate that the restructuring will result in a reduction in our operating expenses, effective in the first quarter of 2006, of an estimated $3.5 million to $4.5 million per quarter. Remaining costs to complete the restructuring will be recorded in future periods as incurred and are not expected to be significant. Although the restructuring was substantially completed during the fourth quarter of 2005, we cannot be certain as to the actual amount of any remaining restructuring charges or the timing of their recognition for financial reporting purposes. The benefits of the restructuring may not materialize for a number of reasons, including the possibility that we may incur unanticipated costs in closing facilities or consolidating our operations. In addition, we expect that a portion of the estimated reduction in our operating expenses resulting from the restructuring will be offset by other operating expenses, including stock compensation expense that we will recognize beginning in the first quarter of 2006 as a result of the adoption of SFAS No. 123R. If we are unsuccessful in realizing the benefits of our restructuring plan, we may experience disruptions in our operations and higher ongoing costs, which may adversely affect our operating results.

Interest and other income (expense), net of $17.1 million in 2005 includes $8.5 million of interest income from marketable securities and cash equivalents, and $9.3 million of gains from the sale of UMC common stock and extinguishment of Zero Coupon Convertible Subordinated Notes due July 1, 2010 partially offset by amortization of issuance costs of Zero Coupon Convertible Subordinated Notes due July 1, 2010. The increase in interest and other income (expense), net from fiscal 2004 to fiscal 2005 was primarily due to higher interest yields on cash and investment balances combined with additional gains on extinguishment of our convertible notes. The increase from fiscal 2003 to fiscal 2004 was primarily due to gains on the sale of UMC common stock and extinguishment of our convertible notes. To the extent market conditions allow, we may make similar extinguishments of our convertible notes and sales of UMC common stock in future quarters.

We are not currently paying federal or state income taxes and do not expect to pay such taxes in 2006. Due to the tax benefit caused by the restructuring loss resulting from closure of the United Kingdom research and development center, net 2005 foreign income tax was negligible. In 2006, we expect to pay foreign income taxes at levels comparable to 2004 and prior years.

* Product classification

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Results of Operations

The following table sets forth, for the periods indicated, the percentage of revenue represented by selected items reflected in our Consolidated Statement of Operations:

Revenue.   Revenue was $211.1 million in 2005, a decrease of 6.5% from 2004. Revenue was $225.8 million in 2004, an increase of 7.7% over 2003 revenue of $209.7 million. The composition of our revenue by product segment for the years presented was as follows:

Prior to the acquisition of Agere FPGA, we had no revenue from FPGA products.

The decrease in revenue in 2005 as compared to 2004 was primarily due to a decline in our Mainstream* and Mature* products, which declined 29% and 19%, respectively, for the year and more than offset revenue growth from New* products which increased 66% for the same time period. Further, our sales were affected by a decline in business conditions beginning in the third quarter of 2004 attributable to general weakening in the communications end market which began to improve at a slow pace in the first quarter of 2005 and continued to improve slowly through the end of 2005. During 2003, our revenue was adversely affected by the business downturn experienced by the semiconductor and programmable logic markets that began in 2001, offset in part by a general business recovery experienced late in 2003.

Revenue from export sales as a percentage of total revenue was approximately 77% for 2005, 71% for 2004 and 68% for 2003. We expect export sales to continue to represent a significant portion of revenue.

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Our sales by geographic region were as follows (in thousands):

During 2005, total units sold decreased by four percent while overall average selling prices declined by two percent when compared to 2004. The 2005 decrease in units sold is predominantly attributable to lower sales of Mainstream* and Mature* products due to reduced end market demand while the decrease in average selling prices is primarily due to product mix. Average selling prices of Mainstream* products increased by five percent in 2005 compared to 2004 while units sold decreased by 33%. From a product line viewpoint, in 2005 there was a 15% increase in FPGA units sold, partially offset by a 19% decrease in average selling prices when compared to 2004. For PLD products in 2005, units sold decreased four percent and average selling prices decreased by one percent when compared to 2004. During 2004, total units sold increased by 10% and average selling prices declined by three percent when compared to 2003. In 2004, units sold increased due to sales of New* products while average selling prices were adversely impacted by lower selling prices of Mature* products. Our ability to maintain or increase the level of our average selling price is dependent on the continued development, introduction and market acceptance of new products. See “Factors Affecting Future Results.”

Gross Margin.   Our gross margin percentage was 55% for 2005 and 57% for 2004 and 2003. Changes in the gross margin percentage reflect revenue growth in New* products, which typically carry an initial lower gross margin, and a decline in revenue from Mature* products, which typically carry a higher gross margin. Additionally, in the fourth quarter of 2005 we initiated a last-time buy program to obsolete certain mature products resulting in a charge to cost of sales to write down excess inventory.

Research and Development.   Research and development expense was $95.4 million for 2005 compared to $91.0 million for 2004 and $87.1 million for 2003. Research and development expenses consist primarily of personnel, masks, prototype wafers, third-party design automation software, assembly tooling and qualification expenses. The increases in 2005 and 2004 when compared to the prior year resulted primarily from mask and engineering wafer costs for the completion of new products, and to a lesser extent, personnel related costs. We believe that a continued commitment to research and development is essential in order to maintain product leadership and provide innovative new product offerings, and therefore we expect to continue to make significant future investments in research and development. As we continue to move to more advanced process technologies such as 90nm and beyond, mask costs are becoming increasingly more expensive and will therefore increasingly represent a greater proportion of total research and development expenses.

Selling, General and Administrative.   Selling, general and administrative expense was $57.5 million in 2005, $53.8 million in 2004 and $50.8 million in 2003. The 2005 increase compared to 2004 was primarily due to legal expenses related to the pending shareholder class action suit, the Securities and Exchange Commission’s ongoing informal inquiry, and the settled shareholder derivative suit, SLC investigation and Audit Committee investigation. Legal expenses related to these matters resulted in a total charge of $6.3 million during 2005 and $1.6 million in 2004. These increases are partially offset by decreases primarily in

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consulting services, sales related expenses and other miscellaneous items. The 2004 increase compared to 2003 was primarily due to the increase in sales commissions and marketing expenses related to new products and increased professional and legal fees related to initial compliance with the requirements of Section 404 of the Sarbanes-Oxley Act of 2002.

Amortization of Intangible Assets.   Amortization of intangible assets is related to our 2002 acquisitions, discussed above, our 1999 Vantis acquisition and our 2001 acquisition of Integrated Intellectual Property, Inc. (“I2P”). Amortization expense was $16.2 million in 2005, $47.2 million in 2004 and $77.1 million in 2003. The decrease in amortization expense in 2005 was attributable to completion of amortization of intangible assets from the Vantis and Agere acquisitions during 2004. The decrease in amortization expense in 2004 was attributable to intangible assets from the Vantis acquisition which were fully amortized during 2004.

Restructuring Charges.   During the fourth quarter of 2005, we recorded a restructuring charge of $11.9 million related to our plan to consolidate operations, streamline engineering functions and lower operating expenses. The restructuring encompassed three major components—streamlining of our research and development sites, a voluntary separation program for certain employees and an organizational consolidation within our largest design center. These actions did not impact our product direction or product roll-out strategy, which remain unchanged.

The restructuring charge primarily relates to separation packages and costs to vacate space under long-term lease arrangements. The plan included reduction of our work force by approximately 14% during the fourth quarter of 2005. The positions affected were mainly related to research and development activities. Lease costs represent ongoing contractual lease payments, less estimated proceeds from subleasing activities, and the remaining book value of leasehold improvements for various buildings located in Texas, Colorado, Utah and the United Kingdom. Leasehold improvements were charged to restructuring when the premises were vacated, and lease costs will be charged against the restructuring accrual on a monthly basis until the lease agreements expire, or otherwise terminate. In addition, we recorded a charge of $2.7 million to write off an intellectual property license related to these restructuring activities.

Total cash outlays under the restructuring plan are expected to be $8.7 million, of which $1.0 million was paid during the fourth quarter of 2005, and $4.7 million was paid in the first quarter of 2006 primarily related to severance payments. The current liability estimates accrued for abandoned leases, net of estimated sublease payments, will be paid over their respective lease terms through 2013, or earlier if termination of leases is negotiated. Other remaining cash expenditures for relocating employees and transferring equipment from vacated buildings are expected to be paid during the first quarter of 2006.

The restructuring plan was substantially complete as of December 31, 2005. Remaining costs to complete the restructuring will be recorded in future periods as incurred and are not expected to be significant.

The following table displays the current estimate for each major type of cost associated with the restructuring (in thousands):

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Included in the above amounts are disposals of leasehold improvements and fixed assets totaling $0.3 million and $0.2 million, respectively. The above restructuring charges are based on estimates that are subject to change. Lease charges could change based on our ability to either generate sublease income or terminate lease obligations at the amounts estimated, and is dependent upon lease market conditions at the time we negotiate the potential arrangements. Variance from these estimates could alter our ability to achieve anticipated expense reductions in the planned timeframe and modify our expected cash outflows and working capital.

Interest Income.   Interest income was $8.5 million in 2005, $4.4 million in 2004 and $3.6 million in 2003. The increase in 2005 when compared to 2004 is primarily attributable to higher interest rates. The increase in 2004 when compared to 2003 was attributable to higher balances and interest rates.

Interest Expense.   Interest expense was insignificant in 2005 and 2004, and was $7.1 million in 2003. Substantially all interest expense resulted from the debt issued to partially fund our Vantis acquisition. The decrease in 2005 and 2004 when compared to 2003 is due to the extinguishment of our remaining 43¤4% Convertible Subordinated Notes in July 2003. (See Note 10 to our Consolidated Financial Statements).

Other Income, net.   Other income, net, was $8.6 million in 2005, $7.0 million in 2004 and $0.4 million in 2003. For 2005, Other income, net, consists of a $4.3 million gain on sale of UMC common stock and a $4.9 million gain on extinguishment of Zero Coupon Convertible Subordinated Notes due July 1, 2010, net of $0.9 million amortization of convertible note issuance costs and other costs. For 2004, Other income, net, consists of a $6.1 million gain on sale of UMC common stock and a $2.8 million gain on extinguishment of Zero Coupon Convertible Subordinated Notes due July 1, 2010, net of $1.9 million amortization of convertible note issuance costs and other costs. For 2003, Other income, net, consists of $1.4 million of gain recorded on the extinguishment of our Zero Coupon Convertible Subordinated Notes due July 1, 2010, substantially offset by the $4.7 million call premium associated with the extinguishment of our 43¤4% Convertible Subordinated Notes (see Note 10 to our Consolidated Financial Statements).

Provision (benefit) for Income Taxes.   The 2005 and 2004 tax provisions are related to adjustments to reserves and to income taxes on our foreign subsidiaries primarily engaged in selling and research and development activities. The tax benefit in 2003 is primarily a result of releasing $3.4 million of tax reserves as the related statute of limitations expired and a $2.5 million refund of Federal income taxes (see Note 8 to our Consolidated Financial Statements).

Critical Accounting Policies and Estimates

Critical Accounting Policies are those that are both most important to the portrayal of a company’s financial condition and results and require management’s most difficult, subjective and complex judgments, often as a result of the need to make estimates about the effect of matters that are inherently uncertain. A description of our critical accounting policies follows.

Use of Estimates.   The preparation of financial statements in conformity with generally accepted accounting principles requires management to make estimates and assumptions that affect the reported amounts and classification of assets, such as accounts receivable, inventory and deferred income taxes and liabilities, such as accrued liabilities, income taxes and deferred income, disclosure of contingent assets and liabilities at the date of the financial statements and the reported amounts of revenues and expenses during the fiscal periods presented. Actual results could differ from those estimates.

Revenue recognition.   Revenue from direct customers is recognized upon shipment provided that persuasive evidence of a sales arrangement exists, the price is fixed and determinable, title has transferred, collection of resulting receivables is probable, there are no customer acceptance requirements and no remaining significant obligations. Certain of our sales are made to distributors under agreements providing price protection and right of return on certain allowed and agreed upon unsold merchandise. Revenue and

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costs relating to such distributor sales are deferred until the product is sold by the distributor and related revenue and costs are then reflected in income.

Our method of revenue recognition for deferred distributor sales is based on certain assumptions including our average collection experience compared to resale reported by the distributors. To the extent actual results differ from these assumptions, revenue will change accordingly.

Deferred income.   In determining the balance in the deferred income account, we make estimates of salable and returnable inventory at certain distributors and we make estimates similar to those used to value inventory on hand to value inventory at these distributors. To the extent actual results differ from these estimates, the balances of reported deferred income, revenue and cost of products sold will change accordingly.

Inventory.   We value inventory at the lower of cost or market on a quarterly basis. In addition, we write down unproven, excess and obsolete inventories to net realizable value. To value our inventory, we make a number of estimates and assumptions including future price declines and forecasted demand for our products. To the extent actual results differ from these estimates and assumptions, the balances of reported inventory and cost of products sold will change accordingly.

Long-Lived Assets.   We account for our long-lived assets, primarily property and equipment and amortizable intangible assets, in accordance with Statement of Financial Accounting Standards (“SFAS”) No. 144, “Accounting for the Disposal of Long-Lived Assets,” which requires us to review the impairment of long-lived assets whenever events or changes in circumstances indicate that the carrying amount of an asset may not be recoverable. Impairment is determined by comparing the estimated undiscounted cash flows to the carrying amount. A loss is recorded if the carrying amount of the asset exceeds the estimated undiscounted cash flows. Intangible assets are generally being amortized over five years, and fifteen years for income tax purposes, on a straight-line basis.

Restructuring Charges.   Restructuring charges are recognized and recorded at fair value as incurred in accordance with SFAS No. 146, “Accounting for Costs Associated with Exit or Disposal Activities.” Restructuring costs include severance and other costs related to employee terminations, facility costs related to abandonment of various leased research and development sites, and other costs associated with the exit and disposal activities. As changes to these estimates occur in subsequent periods resulting from timing changes or other factors, we will record either an increase or decrease to the estimated costs previously recorded. It is possible that actual costs incurred in the future will differ from the amounts recorded as of December 31, 2005.

Accounting for income taxes.   To report income tax expense related to operating results, we record current and deferred income tax assets and liabilities in our balance sheet. In determining the value of our deferred tax assets, we make estimates of future taxable income. As of December 31, 2005, 2004 and 2003, we have recorded full valuation allowances for all of our U.S. deferred tax assets due to uncertainties regarding their realization. As of December 31, 2005, we have recorded a partial valuation allowance against our foreign deferred tax assets. We had no foreign deferred tax assets at December 31, 2004 or 2003.

In addition, in determining the value of income tax liabilities we make estimates of the results of future examinations of our income tax returns by taxing authorities. We have adequately provided in our financial statements for additional taxes that we estimate may result from these examinations. If these amounts provided prove to be more than what is necessary, the reversal of the reserves would result in tax benefits being recognized in the period in which we determine the liability is no longer necessary. If an ultimate tax assessment exceeds our estimate of tax liabilities, an additional charge to expense will result. See Note 8 and Note 13 to our Consolidated Financial Statements.

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Stock Based Compensation.   Effective January 1, 2006, we adopted SFAS No. 123 (revised 2004), “Share-Based Payment,” or SFAS No. 123R. SFAS No. 123R requires all share-based payments, including grants of stock options, to be recognized in our financial statements based on their respective grant date fair values. Stock-based compensation expense recognized in our financial statements in 2006 and thereafter is based on awards that are ultimately expected to vest. The amount of stock-based compensation expense in 2006 and thereafter will be reduced for estimated forfeitures based on historical experience. Forfeitures are required to be estimated at the time of grant and revised, if necessary, in subsequent periods if actual forfeitures differ from those estimates. We will evaluate the assumptions used to value stock awards on a periodic basis. If factors change and we employ different assumptions, stock-based compensation expense may differ from what we have recorded in the past. We have estimated that stock based compensation expense under SFAS No. 123R for the first quarter of 2006 will be approximately $1.0 million. We are in the process of evaluating the impact on our financial statements for the remainder of fiscal 2006.

Liquidity and Capital Resources

As of December 31, 2005, our principal source of liquidity was $264.2 million of cash and marketable securities, which was $32.1 million less than the balance of $296.3 million at December 31, 2004. This decrease in cash and marketable securities was primarily due to a $25.0 million payment to Fujitsu in January 2005 pursuant to the Fujitsu APP Agreement entered into in September 2004. Working capital decreased by $51.4 million to $277.1 million at December 31, 2005 from $328.5 million at December 31, 2004. This decrease was the result of $30.2 million paid to extinguish Zero Coupon Convertible Subordinated Notes due July 1, 2010, capital expenditures of $11.3 million during 2005 and the remainder (primarily related to restructuring accrued charges) resulting from operations. During 2005 we used $20.0 million of cash and cash equivalents in our operations, compared to $6.0 million generated in 2004. Cash flow from operating activities for the years ended December 31, 2005 and 2004 each included a $25.0 million payment to Fujitsu pursuant to the Fujitsu APP Agreement.

Accounts Receivable increased $4.0 million at December 31, 2005 compared to December 31, 2004 due to higher billings in the later portion of the fourth quarter of 2005 as compared to the similar period in 2004 combined with higher revenues in the December 2005 quarter compared to the December 2004 quarter.

Inventories decreased $10.1 million, or 26%, at December 31, 2005 compared to December 31, 2004 primarily due to levels of shipments being greater than procurements. In the fourth quarter of 2005 we initiated a last-time buy program to obsolete certain mature products resulting in an inventory write-down of $1.8 million.

Prepaid expenses and other current assets increased by $0.9 million at December 31, 2005 as compared to December 31, 2004, which is related to an increase in anticipated receipt of prepaid wafers in the subsequent twelve month period (see Note 4 to our Consolidated Financial Statements).

The current portion of equity securities available for sale decreased from $24.2 million at December 31, 2004 to $1.4 million at December 31, 2005. The decrease of $22.8 million is almost entirely due to the sale of UMC common stock during the current year. The balance of these securities represents the portion of our investment in UMC that is available for sale during 2006 without restriction (see Note 4 to our Consolidated Financial Statements).

Property and equipment, less accumulated depreciation, decreased by $2.1 million at December 31, 2005 as compared to December 31, 2004 and decreased by $6.2 million in 2004 as compared to the balance in the prior year due to depreciation expense being greater than expenditures for capital equipment. Capital expenditures were $11.3 million, $10.7 million and $9.8 million in 2005, 2004 and 2003,

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respectively. We expect to spend $10.0 million to $15.0 million on capital expenditures for the fiscal year ending December 31, 2006.

Net intangible assets decreased by $14.3 million and $43.8 million in 2005 and 2004 as compared to the balances of the prior years, respectively, which is attributable to amortization of these assets.

Foundry investments, advances and other assets decreased by approximately $18.4 million at December 31, 2005 compared to December 31, 2004 primarily due to receipt of $12.4 million in wafers from Seiko Epson pursuant to the advance payment production agreement, under which our investment is to be repaid with semiconductor wafers over a multi-year period. Further, we wrote off an intellectual property license of $2.7 million, as discussed in our charges for restructuring. Foundry investments, advances and other assets increased by approximately $11.0 million at December 31, 2004 as compared to the balance of the prior year. This was primarily due to recording of a $50.0 million advance to Fujitsu for future wafer supply (see Note 4 to our Consolidated Financial Statements), partially offset by a decline in our UMC investment due to the sale of $36.6 million of shares and a $13.2 million decline in the market price of remaining shares of UMC common stock.

As of December 31, 2005, we owned 25.7 million shares of UMC common stock. Future sales of these shares may result in a reduction in wafer capacity guaranteed to us by UMC. During 2005, we sold approximately 37.5 million shares of UMC common stock for approximately $27.5 million in cash, resulting in a gain of $4.3 million. During 2004, we sold 36.6 million shares of our UMC common stock for approximately $29.6 million in cash, resulting in a gain of approximately $6.1 million. In the future, we may choose to liquidate additional UMC common stock.

In 1997 we entered into an advance payment production agreement with Seiko Epson and Epson Electronics America, Inc. (“EEA”), which was subsequently amended in 2002 and March 2004. Under this agreement we advanced  $51.3 million to Seiko Epson to finance construction of an eight-inch sub-micron semiconductor wafer manufacturing facility. The advance is to be repaid with semiconductor wafers over a multi-year period. No interest income is recorded. The agreement calls for wafers to be supplied by Seiko Epson through EEA pursuant to purchase agreements with EEA. Cumulatively, $38.9 million of these payments have been repaid to us in the form of semiconductor wafers. We currently estimate that approximately $12.4 million of the outstanding advances will be repaid with semiconductor wafers during fiscal 2006 and are thus reflected as part of Prepaid expenses and other current assets in our Consolidated Balance Sheet. We are not obligated to make additional payments under this agreement.

On June 20, 2003, we issued $200.0 million in Zero Coupon Convertible Subordinated Notes due July 1, 2010. No interest will accrue or be payable related to these notes. Holders of these notes may convert the notes into shares of our common stock at any time before the close of business on the date of their maturity, unless the notes have been previously redeemed or repurchased, if (1) the price of our common stock issuable upon conversion of a note reaches a specified threshold, (2) the notes are called for redemption, (3) if we request a redemption, or make a distribution to common stockholders that is dilutive to note holders or if we become a party to a merger or consolidation or sale of substantially all of our assets or (4) the trading price of the notes falls below certain thresholds. The conversion price is approximately $12.06 per share, subject to adjustment in certain circumstances. On or after July 1, 2008, we have the option to redeem all or a portion of the notes that have not been previously repurchased or converted at 100% of the principal amount of the notes. On July 1, 2008, holders have the option to require us to purchase all or a portion of their notes in cash at 100% of the principal amount of the notes. Holders also have the right, subject to certain conditions, to require us to repurchase the notes in the event of a “fundamental change” (as defined in the indenture governing the notes) at 100% of the principal amount of the notes. Generally, a fundamental change is an occurrence resulting in substantially all of our common stock being converted into common stock which is not listed on a United States stock exchange or Nasdaq.

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The notes are subordinated in right of payment to all of our senior indebtedness, and are structurally subordinated as to the revenues and assets of our subsidiaries to all debt and other liabilities of our subsidiaries. At December 31, 2005, we had no senior indebtedness and our subsidiaries had approximately $2.8 million of debt and other liabilities outstanding. Issuance costs relative to these convertible notes are included in Foundry investments, advances and other assets and aggregated approximately $5.4 million and are being amortized to expense over the lives of the notes. Accumulated amortization of these issuance costs was approximately $4.5 million and $3.2 million as of December 31, 2005 and December 31, 2004, respectively.

In October 2003, our Board of Directors authorized management to repurchase up to $100.0 million of our Zero Coupon Convertible Subordinated Notes due July 1, 2010. During 2005, we extinguished $35.5 million of these notes for approximately $30.2 million in cash and recognized a net gain of approximately $4.9 million after writing off approximately $0.4 million of unamortized issuance costs. During 2004, we extinguished approximately $15.0 million of these notes for approximately $12.0 million in cash and recognized a net gain of approximately $2.8 million after writing off approximately $0.2 million of unamortized issuance costs. In the first quarter of 2006, we extinguished $10.0 million of our Zero Coupon Convertible Subordinated Notes due July 1, 2010 for $8.7 million and net of $0.1 million amortization of issuance costs. The extinguishment resulted in a gain of $1.2 million which will be included in Interest and other income (expense) for the March 31, 2006 quarter. In the future we may choose to extinguish additional notes.

On July 21, 2003, we extinguished for cash all of our outstanding 43¤4% Convertible Subordinated Notes due in 2006, originally issued in October 1999, plus accrued interest. Total cash paid at extinguishment approximated $178.8 million, including par value of $172.3 million, accrued interest of approximately $1.8 million and a call premium of 2.71% of the outstanding notes, or approximately $4.7 million. This call premium, plus unamortized issuance costs of approximately $1.0 million as of the extinguishment date, was recorded as Other expense in the quarter ended September 30, 2003.

On September 10, 2004, we entered into an Advance Payment and Purchase Agreement (the “Fujitsu APP Agreement”) with Fujitsu Limited (“Fujitsu”), pursuant to which we will advance $125.0 million to Fujitsu in support of the development and construction of a new 300mm wafer fabrication facility in Mie, Japan. The initial two payments of $25.0 million each were made in October 2004 and January 2005, with the remaining payments to be made in two stages upon the achievement of certain milestones. We currently anticipate that the achievement of these milestones will occur in the second and third quarters of 2006.

Our $125.0 million advance will be credited against the purchase price of 300mm wafers received from the new wafer fabrication facility. The Fujitsu APP Agreement will continue until the full amount of the advance payment has been returned to us in the form of wafers or other repayment, subject to the right of either party to terminate the agreement upon the occurrence of certain events. We may request a refund of the unused amount of the advance payment if we have not used all of our wafer credits by December 31, 2007. The repayment obligation of Fujitsu is unsecured.

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The following table summarizes our significant contractual cash obligations at December 31, 2005 (in thousands):

(1)          Certain of our facilities and equipment are leased under operating leases, which expire at various times through 2013. Rental expense under the operating leases was approximately $8.6 million, $5.9 million and $5.8 million for 2005, 2004 and 2003, respectively. Included in the above amounts for operating leases are the properties which were vacated as part of our restructuring plan.

(2)          Represents obligations to make payments upon completion of milestones presently estimated to occur by the second and third quarters of 2006.

Included in the above operating lease amounts are certain properties which are currently subleased through April 2006. A portion of this sublease income is payable to the property owner. For fiscal 2006, future minimum sublease receipts net of such payments, based on agreements in place at December 31, 2005, total $1.0 million.

In December 2000, our Board of Directors authorized management to repurchase up to five million shares of our common stock. As of December 31, 2005, we had repurchased 1,136,000 shares at an aggregate cost of approximately $20.0 million. There were no repurchases of common stock in 2003, 2004 or 2005.

Congress adopted the American Jobs Creation Act of 2004 which among other things provides companies with foreign subsidiaries the opportunity to repatriate earnings of such subsidiaries at a reduced tax rate. Presently we have substantial tax loss carryforwards which could be used to offset tax liabilities arising from repatriation of foreign subsidiary earnings. We are not planning to repatriate earnings of our foreign subsidiaries.

We believe that our existing liquid resources and expected cash generated from operations combined with our ability to borrow additional funds will be adequate to meet our operating and capital requirements and obligations for the next 12 months. We may in the future seek new or additional sources of funding. In addition, in order to secure additional wafer supply, we may from time to time consider various financial arrangements including joint ventures, equity investments, advance purchase payments, loans, or similar arrangements with independent wafer manufacturers in exchange for committed wafer capacity. To the extent that we pursue any such additional financing arrangements, additional debt or equity financing may be required. There can be no assurance that such additional financing will be available when needed or, if available, will be on favorable terms. Any future equity financing will decrease existing stockholders’ equity percentage ownership and may, depending on the price at which the equity is sold, result in dilution.

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New Accounting Pronouncements

In March 2004, the Emerging Issues Task Force reached a consensus on recognition and measurement guidance previously discussed under EITF 03-01. The consensus clarifies the meaning of other-than-temporary impairment and its application to investments classified as either available-for-sale or held-to-maturity under SFAS No. 115, “Accounting for Certain Investments in Debt and Equity Securities.” The recognition and measurement guidance for which the consensus was reached in the March 2004 meeting was to be applied to other-than-temporary impairment evaluations in reporting periods beginning after June 15, 2004. In September 2004, the FASB issued a final FASB Staff Position that delayed the effective date for the measurement and recognition guidance for all investments within the scope of EITF 03-01. The consensus reached in March 2004 also provided for certain disclosure requirements associated with cost method investments which was effective for fiscal years ending after June 15, 2005. In July 2005, the FASB decided to issue proposed FSP EITF 03-01-a, “Implementation Guidance for the Application of Paragraph 16 of EITF Issue No. 03-01,” as final. The final FSP (retitled FSP FAS 115-1) supersedes EITF 03-01 and is effective for other-than-temporary impairment analyses conducted in periods beginning after December 15, 2005. During 2006, management will evaluate the effect of adopting the recognition and measurement guidance.

In December 2004, the FASB issued a Statement entitled, “Share Based Payment—a revision of SFAS No. 123 (“SFAS No. 123R”), Accounting for Stock Based Compensation,” that addresses the accounting for share-based payment transactions in which a company receives employee services in exchange for either equity instruments of the company or liabilities that are based on the fair value of the company’s equity instruments or that may be settled by the issuance of such equity instruments. The statement eliminates the ability to account for share-based compensation transactions using the intrinsic method currently used by the company and generally requires that such transactions be accounted for using a fair-value-based method and recognized as expense in the company’s Consolidated Statement of Operations. The effective date of the standard is for fiscal years beginning after June 15, 2005. Accordingly, we have adopted the standard beginning January 2006. Under SFAS No. 123R, the pro forma disclosures previously permitted will no longer be an alternative to financial statement recognition. We are applying the Black-Scholes valuation model in determining the fair value of share-based payments to employees, which is being amortized over the vesting period. In addition, the SEC issued Staff Accounting Bulletin (“SAB”) No. 107 in March 2005, which includes interpretive guidance for the initial implementation of SFAS No. 123R. The adoption of SFAS No. 123R will have a significant and adverse impact on our Consolidated Statement of Operations, as we are required to expense the fair value of our stock option grants and stock purchases under our employee stock purchase plan. However, it will have no impact on our cash flow. We have estimated that stock based compensation expense under SFAS No. 123R for the first quarter of 2006 will be approximately $1.0 million. We are in the process of evaluating the impact on our Consolidated Financial Statements for the remainder of fiscal 2006.

In May 2005, the FASB issued SFAS No. 154, “Accounting Changes and Error Corrections—a replacement of APB Opinion No. 20 and FASB Statement No. 3” (SFAS No. 154). SFAS No. 154 requires retrospective application to prior periods’ financial statements for changes in accounting principle, unless it is impracticable to determine either the period-specific effects or the cumulative effect of the change. SFAS No. 154 is effective for accounting changes and corrections of errors made in fiscal years beginning after December 15, 2005. We do not expect the adoption of this standard to have a material impact on our Consolidated Financial Statements.

Off-Balance Sheet Arrangements

We do not have any financial partnerships with unconsolidated entities, such as entities often referred to as structured finance or special purpose entities, which are often established for the purpose of facilitating off-balance sheet arrangements or other contractually narrow or limited purpose. Accordingly,

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we are not exposed to any financing, liquidity, market or credit risk that could arise if we had such relationships.

Item 7A. Quantitative and Qualitative Disclosures About Market Risk.

As of December 31, 2005 and December 31, 2004 our investment portfolio consisted of fixed income securities of $258.7 million and $287.0 million, respectively. As with all fixed income instruments, these securities are subject to interest rate risk and will decline in value if market interest rates increase. If market rates were to increase immediately and uniformly by 10% from levels as of December 31, 2005 and December 31, 2004, the decline in the fair value of our portfolio would not be material. Furthermore, we have the ability to hold our fixed income investments until maturity and, therefore, we would not expect to recognize such an adverse impact in our results from operations or statement of cash flows.

The fair market value of the Zero Coupon Convertible Subordinated Notes (the “Notes”) due July 1, 2010, is subject to interest rate risk and market risk due to the convertible feature of the Notes and the fair market value of the Company’s common stock. Generally the fair market value of fixed interest rate debt will increase as interest rates fall and decrease as interest rates rise. The interest and market value changes affect the fair market value of the Notes but do not impact our financial position, cash flows or results of operations. As of December 31, 2005 and 2004, the fair value of the Notes was approximately $114.1 million and $145.1 million, respectively based on quoted market prices.

We have international subsidiary and branch operations. Additionally, we sell products to Japanese customers denominated in Yen. We therefore are subject to foreign currency exchange rate exposure. To minimize foreign exchange risk related to Yen-based net assets on our Consolidated Balance Sheet, on August 11, 2004, we entered into an agreement with a bank under the terms of which we can borrow up to $6.0 million in Japanese Yen in a revolving line of credit arrangement. Outstanding borrowing is collateralized by marketable securities. Interest on outstanding borrowing is based on the Japanese LIBOR Fixed Rate, and averaged 1.04% for the year ended December 31, 2005. Outstanding borrowing at December 31, 2005 was $4.2 million. This arrangement can be terminated at anytime by either party.

We are exposed to equity price risk due to our equity investment in UMC (see Note 4 to our Consolidated Financial Statements). Neither a 10% increase nor a 10% decrease in equity price related to this investment would have a material effect on our Consolidated Financial Statements as of December 31, 2005 or December 31, 2004. We have not attempted to reduce or eliminate this equity price risk through hedging or similar techniques. As a result, sustained changes in the market price of UMC common stock could impact our financial results. To the extent that the market value of our UMC common stock experiences deterioration for an extended period of time, our operating results could be adversely affected.

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Item 8. Financial Statements and Supplementary Data.

Index to Consolidated Financial Statements and Consolidated Financial Statement Schedule

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LATTICE SEMICONDUCTOR CORPORATION
CONSOLIDATED BALANCE SHEET
(in thousands, except share and par value amounts)